Dr Shounak Chakraborty shounak.chakraborty@durham.ac.uk
Assistant Professor
NTHPC: Embracing Near-Threshold Operation for High Performance Multi-core Systems
Chakraborty, Shounak; Safarpour, Mehdi; Silvén, Olli
Authors
Mehdi Safarpour
Olli Silvén
Abstract
System-on-Chip (SoC) manufacturers use Core Level Redundancy (CLR) scheme to cope with fabrication defects. By providing redundancy with extra cores and logic blocks, CLR ensures delivering performance even if a small number of the functional units are defective. CLR even enables selling lower end products if more cores have failed than needed by the most demanding applications. In the current contribution the mechanisms built for CLR are used to increase throughput while complying with the Thermal Design Power (TDP) constraints. We propose NTHPC, that utilizes the designed redundancy support to improve system performance without violating thermal limits. This is done by operating the logic at a voltage close to the threshold voltage of the transistors. Our study using an Intel Xeon multiprocessor shows that Near Threshold Computing (NTC) with CLR mechanisms for thermal controls enabled up to 10.8% average throughput improvement in comparison to plain power gating.
Citation
Chakraborty, S., Safarpour, M., & Silvén, O. (2023, July). NTHPC: Embracing Near-Threshold Operation for High Performance Multi-core Systems. Presented at SAMOS 2023, Samos, Greece
Presentation Conference Type | Conference Paper (published) |
---|---|
Conference Name | SAMOS 2023 |
Start Date | Jul 2, 2023 |
End Date | Jul 6, 2023 |
Online Publication Date | Nov 7, 2023 |
Publication Date | 2023 |
Deposit Date | Jan 9, 2025 |
Print ISSN | 0302-9743 |
Publisher | Springer |
Peer Reviewed | Peer Reviewed |
Volume | 14385 |
Pages | 33-42 |
Series Title | Lecture Notes in Computer Science |
Series ISSN | 0302-9743 |
Book Title | Embedded Computer Systems: Architectures, Modeling, and Simulation |
ISBN | 9783031460760 |
DOI | https://doi.org/10.1007/978-3-031-46077-7_3 |
Public URL | https://durham-repository.worktribe.com/output/3329014 |
You might also like
MAFin: Maximizing Accuracy in FinFET based Approximated Real-Time Computing
(2024)
Presentation / Conference Contribution
ARCTIC: Approximate Real-Time Computing in a Cache-Conscious Multicore Environment
(2024)
Journal Article
TREAFET: Temperature-Aware Real-Time Task Scheduling for FinFET based Multicores
(2024)
Journal Article
TEEMO: Temperature Aware Energy Efficient Multi-Retention STT-RAM Cache Architecture
(2024)
Presentation / Conference Contribution
Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR)
(2023)
Presentation / Conference Contribution
Downloadable Citations
About Durham Research Online (DRO)
Administrator e-mail: dro.admin@durham.ac.uk
This application uses the following open-source libraries:
SheetJS Community Edition
Apache License Version 2.0 (http://www.apache.org/licenses/)
PDF.js
Apache License Version 2.0 (http://www.apache.org/licenses/)
Font Awesome
SIL OFL 1.1 (http://scripts.sil.org/OFL)
MIT License (http://opensource.org/licenses/mit-license.html)
CC BY 3.0 ( http://creativecommons.org/licenses/by/3.0/)
Powered by Worktribe © 2025
Advanced Search