Memory effects in hybrid silicon-metallic nanoparticle-organic thin film structures

Mabrook, MF; Pearson, C; Kolb, D; Zeze, DA; Petty, MC

Abstract

We report on the electrical behaviour of metal-insulator-semiconductor (MIS) structures fabricated on silicon substrates and using organic thin films as the dielectric layers. These insulating thin films were produced by different methods, including spin-coating (polymethylmethacrylate), thermal evaporation (pentacene) and Langmuir-Blodgett deposition (cadmium arachidate). Gold nanoparticles, deposited at room temperature by chemical self-assembly, were used as charge storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A maximum memory window of 2.5 V was achieved by scanning the applied voltage of an Al/pentacene/Au nanoparticle/SiO2/P-Si structure between 9 and -9 V. (C) 2008 Elsevier B.V. All rights reserved.

Citation

Mabrook, M., Pearson, C., Kolb, D., Zeze, D., & Petty, M. (2008). Memory effects in hybrid silicon-metallic nanoparticle-organic thin film structures. Organic Electronics, 9(5), 816-820

• Journal Article Type: Article
• Publication Date: 2008-10
• Journal: Organic Electronics
• Print ISSN: 1566-1199
• Publisher: Elsevier
• Peer Reviewed: Peer Reviewed
• Volume: 9
• Issue: 5
• Pages: 816-820