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Improvement of Post-Fault Performance of a Cascaded H-bridge Multilevel Inverter

Ouni, S.; Zolghadri, M.R.; Khodabandeh, M.; Shahbazi, M.; Rodriguez, J.; Oraee, H.; Lezana, P.; Schmeisser, A.U.

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Authors

S. Ouni

M.R. Zolghadri

M. Khodabandeh

J. Rodriguez

H. Oraee

P. Lezana

A.U. Schmeisser



Abstract

This paper is focused on improving the post-fault performance of Cascaded H-bridge Multilevel Inverters by decreasing the common mode voltage. First, an algorithm is proposed to determine the optimal post-fault state among all possible states which have the same maximum available voltage. Furthermore, a modified technique is proposed to calculate the references of inverter phase voltages under faulty conditions. This technique leads to a decrease in the common mode voltage when the required output voltage is less than its maximum value. These solutions are mutually employed in the post-fault control system. Simulation and experimental results confirm the effectiveness of the proposed solutions in comparison with the existing methods in different cases.

Journal Article Type Article
Acceptance Date Oct 17, 2016
Online Publication Date Nov 22, 2016
Publication Date Apr 1, 2017
Deposit Date Nov 7, 2016
Publicly Available Date Nov 8, 2016
Journal IEEE Transactions on Industrial Electronics
Print ISSN 0278-0046
Publisher Institute of Electrical and Electronics Engineers
Peer Reviewed Peer Reviewed
Volume 64
Issue 4
Pages 2779-2788
DOI https://doi.org/10.1109/tie.2016.2632058
Public URL https://durham-repository.worktribe.com/output/1370962

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© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.






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