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Memory effects in MIS structures based on silicon and polymethylmethacrylate with nanoparticle charge-storage elements.

Mabrook, M.F.; Jombert, A.S.; Machin, S.E.; Pearson, C.; Kolb, D.; Coleman, K.S.; Zeze, D.A.; Petty, M.C.

Authors

M.F. Mabrook

A.S. Jombert

S.E. Machin

C. Pearson

D. Kolb

M.C. Petty



Abstract

We report on the electrical behaviour of metal–insulator–semiconductor (MIS) structures fabricated on p-type silicon substrates and using polymethylmethacrylate (PMMA) as the dielectric. Gold nanoparticles, single-wall carbon nanotubes and C60, deposited at room temperature, were used as charge-storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A relatively large memory window of about 2.2 V was achieved by scanning the applied voltage of an Al/PMMA/C60/SiO2/Si structure between 4 and −4 V. Gold nanoparticle-based memory devices produced the best charge retention behaviour compared to the other MIS structures investigated.

Journal Article Type Article
Acceptance Date Sep 1, 2008
Online Publication Date Sep 26, 2008
Publication Date 2009-03
Journal Materials Science and Engineering: B
Print ISSN 0921-5107
Publisher Elsevier
Peer Reviewed Peer Reviewed
Volume 159-160
Pages 14-17
DOI https://doi.org/10.1016/j.mseb.2008.09.003
Keywords Cold nanoparticles; C-60; Carbon nanotubes; PMMA; Memory devicesMETALLIC NANOPARTICLES; CARBON NANOTUBE; THIN-FILMS; FABRICATION; DEVICE; LAYERS; OXIDE
Public URL https://durham-repository.worktribe.com/output/1546350