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Quick Diagnosis of Short Circuit Fault in Cascaded H-Bridge Multilevel Inverter using FPGA

Ouni, S.; Zolghadri, M.R.; Rodriguez, J.; Shahbazi, M.; Oraee, H.; Lezana, P.; Schmeisser, A.U.

Authors

S. Ouni

M.R. Zolghadri

J. Rodriguez

H. Oraee

P. Lezana

A.U. Schmeisser



Abstract

Fast and accurate fault detection is the primary step and one of the most important tasks in fault tolerant converters. In this paper, a fast and simple method is proposed to detect and diagnosis the faulty cell in a cascaded H-bridge multilevel inverter under a short circuit fault. In this method, the reference voltage is calculated using switching control pulses and DC-Link voltages. The comparison result of the output voltage and the reference voltage is used in conjunction with active cell pulses to detect the faulty cell. To achieve this goal, the cell which is active when the Fault signal turns to “0” is detected as the faulty cell. Furthermore, consideration of generating the active cell pulses is completely described. Since the main advantage of this method is its simplicity, it can be easily implemented in a programmable digital device. Experimental results obtained with an 11-level inverter prototype confirm the effectiveness of the proposed fault detection technique. In addition, they show that the diagnosis method is unaffected by variations of the modulation index.

Journal Article Type Article
Acceptance Date Sep 7, 2016
Online Publication Date Jan 20, 2017
Publication Date Jan 20, 2017
Deposit Date Nov 7, 2016
Journal Journal of power electronics.
Print ISSN 1598-2092
Electronic ISSN 2093-4718
Publisher Springer
Peer Reviewed Peer Reviewed
Volume 17
Issue 1
Article Number 56-66
Pages 56-66
DOI https://doi.org/10.6113/jpe.2017.17.1.56
Public URL https://durham-repository.worktribe.com/output/1401417
Publisher URL http://www.jpels.org/