A Case Study for a New Invasive Extension of Intel's Threading Building Blocks

Schreiber, Martin; Weinzierl, Tobias

Abstract

We study codes deploying multiple MPI ranks to one node where each rank is parallelised with TBB. A static assignment of cores to ranks here is disadvantageous if the load is not perfectly balanced, the runtime is subject to fluctuations or one MPI rank runs through phases with low concurrency. We propose an extension to TBB where developers manually annotate which code parts could exploit further cores. The cores are then dynamically associated with ranks. Our approach is decentralised, lightweight and minimally invasive w.r.t. code modifications. Some brief performance studies suggest that a flexible, permanently changing assignment of cores to compute ranks can outperform a static distribution, while greedily haggling over cores throughout a simulation might perform even better.

Citation

Schreiber, M., & Weinzierl, T. (2018, January). A Case Study for a New Invasive Extension of Intel's Threading Building Blocks. Presented at HiPEAC 2018 - 3rd COSH Workshop on Co-Scheduling of HPC Applications, Manchester, England

• Presentation Conference Type: Conference Paper (published)
• Conference Name: HiPEAC 2018 - 3rd COSH Workshop on Co-Scheduling of HPC Applications
• Start Date: Jan 23, 2018
• Acceptance Date: Jan 15, 2018
• Publication Date: Jan 23, 2018
• Deposit Date: Jan 16, 2018
• Publicly Available Date: Jan 16, 2018
• Pages: 21-26
• Book Title: Proceedings of HiPEAC 2018 — 3rd COSH Workshop on Co-Scheduling of HPC Applications (COSH 2018).
• DOI: https://doi.org/10.14459/2018md1428538
• Public URL: https://durham-repository.worktribe.com/output/1147426