From statecharts to verilog : a formal approach to hardware/software co-specification

Qin, S.; Chin, W.N.; He, J.; Qiu, Z.

Abstract

Hardware-Software co-specification is a critical phase in co-design. Our co-specification process starts with a high level graphical description in Statecharts and ends with an equivalent parallel composition of hardware and software descriptions in Verilog. In this paper, we first investigate the Statecharts formalism by providing it a formal syntax and a compositional operational semantics. Based on that, a semantics-preserving linking function is designed to compile specifications written in Statecharts into Verilog. The obtained Verilog specifications are then passed to a partitioning process to generate hardware and software sub-specifications, where the correctness is guaranteed by algebraic laws of Verilog.

Citation

Qin, S., Chin, W., He, J., & Qiu, Z. (2006). From statecharts to verilog : a formal approach to hardware/software co-specification. Innovations in Systems and Software Engineering, 2(1), 17-38. https://doi.org/10.1007/s11334-005-0020-2

• Journal Article Type: Article
• Publication Date: 2006-03
• Deposit Date: Apr 23, 2008
• Publicly Available Date: Dec 11, 2009
• Journal: Innovations in Systems and Software Engineering
• Print ISSN: 1614-5046
• Electronic ISSN: 1614-5054
• Publisher: Springer
• Peer Reviewed: Peer Reviewed
• Volume: 2
• Issue: 1
• Pages: 17-38
• DOI: https://doi.org/10.1007/s11334-005-0020-2
• Keywords: Operational semantics, Homomorphism, Algebraic laws, Hardware/software partitioning.
• Public URL: https://durham-repository.worktribe.com/output/1599723