Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture

Smit, L.T.; Smit, G.J.M.; Hurink, J.L.; Broersma, H.J.; Paulusma, D.; Wolkotte, P.T.

Abstract

This work evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled system on chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate quality of service (QoS). A realistic example is mapped using this algorithm.

Citation

Smit, L., Smit, G., Hurink, J., Broersma, H., Paulusma, D., & Wolkotte, P. (2004). Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. In 2004 IEEE International Conference on Field-Programmable Technology: Proceedings: December 6-8, 2004, the University of Queensland, Brisbane, Australia (421-424). https://doi.org/10.1109/fpt.2004.1393315

• Presentation Conference Type: Conference Paper (Published)
• Conference Name: Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)
• Publication Date: Jan 1, 2004
• Deposit Date: Dec 21, 2014
• Publicly Available Date: Jan 9, 2015
• Publisher: Institute of Electrical and Electronics Engineers
• Pages: 421-424
• Book Title: 2004 IEEE International Conference on Field-Programmable Technology: Proceedings: December 6-8, 2004, the University of Queensland, Brisbane, Australia.
• DOI: https://doi.org/10.1109/fpt.2004.1393315
• Public URL: https://durham-repository.worktribe.com/output/1153425