Outputs (44)

First-Order Definable Retraction Problems for Posets and Reflexive Graphs (2004)
Presentation / Conference Contribution
Dalmau, V., Krokhin, A., & Larose, B. (2023, July). First-Order Definable Retraction Problems for Posets and Reflexive Graphs. Presented at 19th Annual IEEE Symposium on Logic in Computer Science (LICS'04), Turku, Finland

A retraction from a structure P to its substructure Q is a homomorphism from P onto Q that is the identity on Q. We present an algebraic condition which completely characterises all posets and all reflexive graphs Q with the following property: the c... Read More about First-Order Definable Retraction Problems for Posets and Reflexive Graphs.

Discretization schemes and numerical approximations of PDE impainting models and a comparative evaluation on novel real world MRI reconstruction applications (2004)
Presentation / Conference Contribution
Karras, D., & Mertzios, G. (2004, December). Discretization schemes and numerical approximations of PDE impainting models and a comparative evaluation on novel real world MRI reconstruction applications. Presented at International Workshop on Imaging Systems and Techniques (IEEE IST 2004), Stresa, Italy

While various PDE models are in discussion since the last ten years and are widely applied nowadays in image processing and computer vision tasks, including restoration, filtering, segmentation and object tracking, the perspective adopted in the majo... Read More about Discretization schemes and numerical approximations of PDE impainting models and a comparative evaluation on novel real world MRI reconstruction applications.

Run-time assignment of tasks to multiple heterogeneous processors (2004)
Presentation / Conference Contribution
Smit, L., Smit, G., Hurink, J., Broersma, H., Paulusma, D., & Wolkotte, P. (2004, December). Run-time assignment of tasks to multiple heterogeneous processors. Presented at 5th PROGRESS Symposium on Embedded Systems., Nieuwegein, The Netherlands

This paper describes the implementation and evaluation of an algorithm that maps a number of communicating processes to a heterogeneous tiled System on Chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy co... Read More about Run-time assignment of tasks to multiple heterogeneous processors.

Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture (2004)
Presentation / Conference Contribution
Smit, L., Smit, G., Hurink, J., Broersma, H., Paulusma, D., & Wolkotte, P. (2004, December). Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. Presented at Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)

This work evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled system on chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an ad... Read More about Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture.