Outputs (17)

STIFF: thermally safe temperature effect inversion aware FinFET based multi-core (2022)
Presentation / Conference Contribution
Chakraborty, S., Soteriou, V., & Själander, M. (2022, May). STIFF: thermally safe temperature effect inversion aware FinFET based multi-core. Presented at CF '22: 19th ACM International Conference on Computing Frontiers, Turin Italy

FinFET, a non-planar device, has become the prevalent choice for chip-multiprocessor (CMP) designs due to its lower leakage and improved scalability as compared to planar CMOS devices. FinFETs are fundamentally different from conventional CMOS circui... Read More about STIFF: thermally safe temperature effect inversion aware FinFET based multi-core.

RESTORE: Real-Time Task Scheduling on a Temperature Aware FinFET based Multicore (2022)
Presentation / Conference Contribution
Sharma, Y., Moulik, S., & Chakraborty, S. (2022, March). RESTORE: Real-Time Task Scheduling on a Temperature Aware FinFET based Multicore. Presented at 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium

In this work, we propose RESTORE that exploits the unique thermal feature of FinFET based multicore platforms, where processing speed increases with temperature, in the context of time-criticality to meet other design constraints of real-time systems... Read More about RESTORE: Real-Time Task Scheduling on a Temperature Aware FinFET based Multicore.

ETA-HP: an energy and temperature-aware real-time scheduler for heterogeneous platforms (2022)
Journal Article
Sharma, Y., Chakraborty, S., & Moulik, S. (2022). ETA-HP: an energy and temperature-aware real-time scheduler for heterogeneous platforms. Journal of Supercomputing, 78(8), 1-25. https://doi.org/10.1007/s11227-021-04257-7

Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive QoS Maximization. (2021)
Journal Article
Chakraborty, S., Saha, S., Själander, M., & Mcdonald-Maier, K. (2021). Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive QoS Maximization. ACM Transactions on Embedded Computing Systems, 20(5s), 1-25. https://doi.org/10.1145/3476993

Achieving high result-accuracy in approximate computing (AC) based real-time applications without violating power constraints of the underlying hardware is a challenging problem. Execution of such AC real-time tasks can be divided into the execution... Read More about Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive QoS Maximization..

WaFFLe: Gated Cache-Ways with Per-Core Fine-Grained DVFS for Reduced On-Chip Temperature and Leakage Consumption (2021)
Journal Article
Chakraborty, S., & Själander, M. (2021). WaFFLe: Gated Cache-Ways with Per-Core Fine-Grained DVFS for Reduced On-Chip Temperature and Leakage Consumption. ACM Transactions on Architecture and Code Optimization, 18(4), 1-25. https://doi.org/10.1145/3471908

Managing thermal imbalance in contemporary chip multi-processors (CMPs) is crucial in assuring functional correctness of modern mobile as well as server systems. Localized regions with high activity, e.g., register files, ALUs, FPUs, and so on, exper... Read More about WaFFLe: Gated Cache-Ways with Per-Core Fine-Grained DVFS for Reduced On-Chip Temperature and Leakage Consumption.

ABACa: Access Based Allocation on Set Wise Multi-Retention in STT-RAM Last Level Cache (2021)
Presentation / Conference Contribution
Agarwal, S., & Chakraborty, S. (2021, July). ABACa: Access Based Allocation on Set Wise Multi-Retention in STT-RAM Last Level Cache. Presented at 2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP), NJ, USA

Exhibition of potential advantages of high density, non-volatility, and low static power consumption makes STTRAM a credible successor to SRAM in caches. However, higher write energy and latency of the STT-RAM limit its potential towards commercial u... Read More about ABACa: Access Based Allocation on Set Wise Multi-Retention in STT-RAM Last Level Cache.

SEAMERS: A Semi-partitioned Energy-Aware scheduler for heterogeneous MulticorE Real-time Systems (2020)
Journal Article
Moulik, S., Das, Z., Devaraj, R., & Chakraborty, S. (2021). SEAMERS: A Semi-partitioned Energy-Aware scheduler for heterogeneous MulticorE Real-time Systems. The Journal of Systems Architecture: Embedded Software Design, 114, Article 101953. https://doi.org/10.1016/j.sysarc.2020.101953

Over the years, the nature of processing platforms is witnessing a significant shift in most of the battery supported real-time systems, which now support a combination of specialized multicores to meet the demands of modern applications. Devising en... Read More about SEAMERS: A Semi-partitioned Energy-Aware scheduler for heterogeneous MulticorE Real-time Systems.